instruction cycle - vertaling naar grieks
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instruction cycle - vertaling naar grieks

BASIC OPERATION CYCLE OF A COMPUTER
Fetch execute cycle; Fetch-execute cycle; Fetch-decode-execute cycle; Execute cycle; Computer cycle; Computer cycles; FE Cycle; CPU cycle; Fetch and execution cycle; Fetch and execute cycle; Machine cycle; I/E time; Processor cycle; Instruction fetching; Instruction fetch; Opcode fetch; Computing cycle
  • Current instruction register]]
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instruction cycle         
κύκλος εντολών
instruction packet         
PART OF A MACHINE INSTRUCTION
Op code; Instruction code; Instruction code (programming); Opcode (programming); Opcodes; Op-code; Operation code; Opstring; Software instruction set; Instruction syllable; Operation string; Instruction opcode; Instruction word; Instruction byte; OpCode; Opcode sequence; Instruction parcel; Processor opcode; Instruction machine code; Instruction packet; Instruction token; Operation code (computing); Program string; Opcode string
πακέτο εντολής
κύκλος εντολών      
instruction cycle

Definitie

fetch-execute cycle
<architecture, processor> The sequence of actions that a central processing unit performs to execute each {machine code} instruction in a program. At the beginning of each cycle the CPU presents the value of the program counter on the address bus. The CPU then fetches the instruction from main memory (possibly via a cache and/or a pipeline) via the data bus into the instruction register. From the instruction register, the data forming the instruction is decoded and passed to the control unit which sends a sequence of control signals to the relevant {function units} of the CPU to perform the actions required by the instruction such as reading values from registers, passing them to the ALU to add them together and writing the result back to a register. The program counter is then incremented to address the next instruction and the cycle is repeated. The fetch-execute cycle was first proposed by {John von Neumann}. (1998-06-25)

Wikipedia

Instruction cycle

The instruction cycle (also known as the fetch–decode–execute cycle, or simply the fetch-execute cycle) is the cycle that the central processing unit (CPU) follows from boot-up until the computer has shut down in order to process instructions. It is composed of three main stages: the fetch stage, the decode stage, and the execute stage.

In simpler CPUs, the instruction cycle is executed sequentially, each instruction being processed before the next one is started. In most modern CPUs, the instruction cycles are instead executed concurrently, and often in parallel, through an instruction pipeline: the next instruction starts being processed before the previous instruction has finished, which is possible because the cycle is broken up into separate steps.